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Power Electronics Europe News
 
UnitedSiC Announces 6 mOhm SiC FET

The company has responded to the power designer’s requests for higher-performance, higher-efficient SiC FETs with the announcement of the 750 V 6 mΩ device which provides a robust short-circuit withstand time rating of 5μs.

The announcement of September 14 includes nine new device/package options in the 750 V SiC FET series, rated at 6, 9, 11, 23, 33, and 44 mΩ. The contribution of wiring in TO-247 package amounts to 1mΩ in the 6 mΩ version. All devices are available in the TO-247-4L package while the 18, 23, 33, 44, and 60 mΩ devices also come in the TO-247-3L. Complemented by the already available 18 and 60 mΩ devices, this 750 V expanded series provides designers with more device options, enabling more design flexibility to achieve an optimum cost/efficiency trade-off while maintaining generous design margins and circuit robustness.

Gen 4 SiC FETs are a ‘cascode’ of a SiC JFET and a co-packaged Silicon MOSFET. These together provide high speed and low losses with high temperature operation, while retaining an easy, stable, and robust gate drive with integral ESD protection. The advantages are quantified by Figures of Merit (FoM) such as RDS(on) x A, a measure of conduction losses per unit die area. Gen 4 SiC FETs achieve the lowest values in the market at both high and low die temperatures. FoM RDS(on) x EOSS/QOSS is important in hard-switching applications. FoM RDS(on) x COSS(tr) is critical in soft-switching applications. “With SiC FETs the switching losses are controlled by the SiC JFET and not directly the the gate charge of the low voltage MOSFET, thus the typical FoM = Ron x Qg is not useful with SiC FETs,” Anup Bhalla explains.

For hard switching applications, the integral body diode of SiC FETs is superior in recovery speed and forward voltage drop to competing Si MOSFET or SiC MOSFET technologies. Other advantages incorporated into the Gen 4 technology are reduced thermal resistance from die to case by advanced wafer thinning techniques and silver-sinter die-attach. “Sintering is the mechanism by which the SiC JFET chip is attached to the Cu leadframe of the package, and by which the low voltage MOSFET is attached to the top of the Sic JFET”, Bhalla underlines.

With their latest improvements in switching efficiency and on-resistance, the new UnitedSiC SiC FETs are ideal for challenging, emerging applications. These include traction drives and on- and off-board chargers in electric vehicles and all stages of uni- and bi-directional power conversion in renewable energy inverters, power factor correction, telecoms converters and AC/DC or DC/DC power conversion generally. Established applications also benefit from use of the devices for an easy boost in efficiency with their backwards compatibility with Si MOSFET and IGBT gate drives and established TO-247 packaging. Pricing (1000-up, FOB USA) for the new 750 V Gen 4 SiC FETs range from $4.15 for the UJ4C075044K3S, to $23.46 for the UJ4SC075006K4S. All devices are available from authorized distributors. AS

www.unitedsic.com

 



 
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