The low power embedded Flash (eFlash) IP block is based on the company’s proprietary 180nm XH018 mixed-signal CMOS technology.

The 128-kbit eFlash is available as an 8k x 16-bit IP block and is based on silicon-oxide-nitride-oxide-silicon (SONOS) Flash technology. The IP block has been designed for low power mixed-signal applications and features a deep power down stand-by mode consuming a maximum of only 50nA.

The IP is targeted at replacing standalone NVM memories and embedded one-time-programmable (OTP) memories in low power applications, enabling onsite program code updates. It is suited to energy harvesting and remotely located internet of things (IoT) devices, where power constraints and harsh environments are encountered, but field re-programmability must be offered at a low cost.

The eFlash IP block complies with the AEC-Q100 standard, and is capable of operating across a temperature range of -40 to 125°C. The SONOS technology enables reliable operation of the IP block when combined with high-voltage options ranging from 6.0 to 45V, claims the company, via the NMOS, PMOS and DMOS transistors available with the XH018 process. Test modes are explicitly designed to test individual memory bit cell currents and achieve 0 PPM in the field. Special test modes have been designed into the IP to optimise production testing and minimise test time and cost, adds the company.